TECHNOLOGIES FOR SCALABLE TRANSLATION CACHING FOR

专利名称：TECHNOLOGIES FOR SCALABLE

TRANSLATION CACHING FOR BINARYTRANSLATION SYSTEMS

发明人：Koichi Yamada,Jose A. Baiocchi

Paredes,Abhik Sarkar,Ajay Harikumar,JiweiLu

申请号：US15202745申请日：20160706

公开号：US20180011696A1公开日：20180111

专利附图：

摘要：Technologies for binary translation include a computing device that allocates atranslation cache shared by all threads associated with a corresponding executiondomain. The computing device assigns a thread to an execution domain, translatesoriginal binary code of the thread to generate translated binary code, and installs thetranslated binary code into the corresponding translation cache for execution. Thecomputing device may allocate a global region cache, generate region metadata

associated with the original binary code of a thread, and store the region metadata in theglobal region cache. The original binary code may be translated using the regionmetadata. The computing device may allocate a global prototype cache, translate theoriginal binary code of a thread to generate prototype code, and install the prototypecode in the global prototype cache. The prototype code may be a non-executableversion of the translated binary code. Other embodiments are described and claimed.

申请人：Koichi Yamada,Jose A. Baiocchi Paredes,Abhik Sarkar,Ajay Harikumar,Jiwei Lu

地址：Los Gatos CA US,Santa Clara CA US,San Jose CA US,Bangalore IN,Pleasanton CAUS

国籍：US,US,US,IN,US

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