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UCC29910A

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ZHCS258A–MAY2011–REVISEDJUNE2011

降压PFC控制器

查询样品:UCC29910A

特性

降压功率因数校正用于在整个线路输入电压范围内实现高效率

低离线启动电流，并采用了旨在实现快速启动及软起动的SmartStart算法。

可兼容依靠AC线路的阻性或传输晶体管馈电型启动方式

针对待机和轻负载条件的低功耗SmartBurst模式用于PFC控制及过流保护的电流检测输入线路检测欠压闭锁(UVLO)

用于外部启动耗尽型FET的检测及驱动控制闭锁故障输入引脚

说明

对于需要高功率因数(>0.9)并希望满足IEC

61000-3-2规范要求的设计人员，UCC29910A降压功率因数校正(PFC)控制器在通用线路输入电压范围内提供了相对平坦的高效性能。固有的浪涌电流限制功能基于一种降压拓扑，可免除增设额外组件的需要。凭借84V的典型总线电压，该拓扑非常适用于低电压应力下游稳压/隔离功率链路，例如：受控于UCC29900的半桥段，（德州仪器文献编

号：SLUS923).这种组合所产生的共模噪声很低，从而降低了滤波要求并实现了异常高的转换效率。UCC29910A拥有AC线路欠压闭锁(UVLO)及旨在实现快速启动的受控软起动功能。通过运用旨在实现同类最佳之无负载及轻负载性能的高级电源管理算法，提升了轻负载效率。

••••••••

应用

••

高效率AC-DC适配器扁平和高密度适配器

简化的应用示意图

VEMCFILTERHSBULKSENSEVACDRIVER411013LINESNSVDD11BIASSUPPLYTSTPFCDRVCS3NCUCC29910APW9BIASSNSCS512BIASCTRLVBULK2NC7REFIN6VSS14FAULT8Pleasebeawarethatanimportantnoticeconcerningavailability,standardwarranty,anduseincriticalapplicationsofTexasInstrumentssemiconductorproductsanddisclaimerstheretoappearsattheendofthisdatasheet.

PRODUCTIONDATAinformationiscurrentasofpublicationdate.ProductsconformtospecificationsperthetermsoftheTexasInstrumentsstandardwarranty.Productionprocessingdoesnotnecessarilyincludetestingofallparameters.

EnglishDataSheet:SLUSAK8A

UCC29910A

ZHCS258A–MAY2011–REVISEDJUNE2011

www.ti.com.cn

这些装置包含有限的内置ESD保护。

存储或装卸时，应将导线一起截短或将装置放置于导电泡棉中，以防止MOS门极遭受静电损伤。

订购信息

器件型号UCC29910APWUCC29910APWR

封装

Plastic,14-PinTSSOP(PW)Plastic,14-PinTSSOP(PW)

PACKING90-Pc.Tube2000-Pc.卷带封装

最大绝对额定值

超过自然通风条件下的工作温度范围（除非另有说明）

(1)(2)(3)

数值

VDD

电源电压Voltage:Allpins

TATJTSTG

Operatingfreeairtemperature,Storagetemperature

(4)

(4)(4)

单位V

4.1-0.3

−0.3toVDD+0.3

−40to105−40to105

260

°C

Operationaljunctiontemperature,Leadtemperature(10seconds)

(1)(2)(3)(4)

Thesearestresslimits.Stressbeyondtheselimitsmaycausepermanentdamagetothedevice.FunctionaloperationofthedeviceattheseoranyconditionsbeyondthoseindicatedunderRECOMMENDEDOPERATINGCONDITIONSisnotimplied.Exposuretoabsolutemaximumratedconditionsforextendedperiodsoftimemayaffectdevicereliability.AllvoltagesarewithrespecttoVSS.

Allcurrentsarepositiveintotheterminal,negativeoutoftheterminal.

HighertemperaturemaybeappliedduringboardsolderingprocessaccordingtothecurrentJEDECJ-STD-020specificationwithpeakreflowtemperaturesnothigherthanclassifiedonthedevicelabelontheshippingboxesorreels.

THERMALINFORMATION

UCC29910A

THERMALMETRIC(1)

θJAθJCtopθJBψJTψJB(1)(2)(3)(4)(5)(6)

Junction-to-ambientthermalresistance(2)Junction-to-case(top)thermalresistance(3)Junction-to-boardthermalresistance(4)Junction-to-topcharacterizationparameter(5)Junction-to-boardcharacterizationparameter(6)

TSSOP(PW)14PINS101.548.943.91.243.3

°C/WUNITS

Formoreinformationabouttraditionalandnewthermalmetrics,seetheICPackageThermalMetricsapplicationreport,SPRA953.

Thejunction-to-ambientthermalresistanceundernaturalconvectionisobtainedinasimulationonaJEDEC-standard,high-Kboard,asspecifiedinJESD51-7,inanenvironmentdescribedinJESD51-2a.

Thejunction-to-case(top)thermalresistanceisobtainedbysimulatingacoldplatetestonthepackagetop.NospecificJEDEC-standardtestexists,butaclosedescriptioncanbefoundintheANSISEMIstandardG30-88.

Thejunction-to-boardthermalresistanceisobtainedbysimulatinginanenvironmentwitharingcoldplatefixturetocontrolthePCBtemperature,asdescribedinJESD51-8.

Thejunction-to-topcharacterizationparameter,ψJT,estimatesthejunctiontemperatureofadeviceinarealsystemandisextractedfromthesimulationdataforobtainingθJA,usingaproceduredescribedinJESD51-2a(sections6and7).

Thejunction-to-boardcharacterizationparameter,ψJB,estimatesthejunctiontemperatureofadeviceinarealsystemandisextractedfromthesimulationdataforobtainingθJA,usingaproceduredescribedinJESD51-2a(sections6and7).

UCC29910A

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ZHCS258A–MAY2011–REVISEDJUNE2011

建议的应用条件

overoperatingfree-airtemperaturerange,allthevoltagesrefertotheVSSpin(unlessotherwisenoted)

最小值

OperatingfreeairtemperatureVDDInputVoltageAllInputs

−403.00

标称值

最大值1053.6VDD

单位°CV

电气特性

超过自然通风条件下的工作温度范围（除非另有说明）

参数

SupplyCurrentIVDDVNMVBHVBLVLMVB(max

)

测试条件

VDD=3.3V

Normalmode(2)PFCDRV=100kHzVB(min)VBHVLINESNS>VBH

Normalmode(2),FAULTpingoes<0.8V

最小值典型值

最大值

81.054270255937919463

单位mAVmVRMS

Operatingcurrent

(1)

VoltageMonitoring

VBULKnominalVLINESNSstart-upVLINESNSbrownoutVLINESNSmaxVBIASSNSmax

1.042258243925907451

1.048264249931913457100

VB(min)VBIASSNSminFAULTInputtfVIT+VIT-VHYS

LatchTime(3)

Positivegoinginputthresholdvoltage

Negativegoinginputthresholdvoltage

InputvoltagehysteresisVIT+-VIT-开关频率

µs

2.51.851

1.450.80.3

PFCDRVsectionfSW

Normalmode(2)

AtPFCDRVpin,normalmode(2),VLINESNS=VBH,VBULK=1.025VIO=-1.5mAIO=-6mAIO=1.5mAIO=6mA

Start-upmode(4),VBIASSNSincreasingandStart-upmode(4),VBIASSNSdecreasingand>VB(min),IO=-1.5mA

9489%VDD-0.25VVDD-0.6V

10090%

10691%VDDVDD0.250.6

VkHz

D最大值Maxdutycycle

HighleveloutputvoltageatPFCDRVpin

LowLevelOutputVoltageatPFCDRVpin

LowleveloutputvoltageatBIASCTRLpin

HighleveloutputvoltageatBIASCTRLpin

(1)(2)(3)(4)

VOH

VOL

BIASCTRLOutputVBC

0VDD-0.25V

0.25

VDD

VBULK,VLINESNSandVBIASSNSvoltagethresholdsarebasedonVREFIN=1.500V.ThesewillchangeproportionallyasVREFINchanges.Inputbiascurrentatthesepinsis±50nAmax.

NormalmodeenteredwhenVDDpresent,VREFIN=1.500V,VLINESNSincreasedfrom0toVBHFAULTinputsshorterthantfcauseanon-latchedshutdown.FAULTinputslongerthantfcausealatchedshutdown.

UCC29910A

ZHCS258A–MAY2011–REVISEDJUNE2011

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器件信息

UCC29910A14-PinTSSOP(PW)VDDVBULK

CSLINESNS

CSREFINNC

1234567141312111098VSSPFCDRVBIASCTRLNCTSTBIASSNSFAULT

终端功能

终端

名称VDDVBULKCSLINESNSCSREFINNC故障BIASSNSTSTNCBIASCTRLPFCDRVVSS

编号1234567891011121314

I/O-IIIII-III-OO-说明

Providespowertothedevice;shouldbedecoupledwithceramiccapacitor(1µF),connecteddirectlyacrosspins1-14.

Voltagesensingofthebulkcapacitor.CurrentsenseinputforPFCstage.RectifiedAClinesenseinput.CurrentsenseinputforPFCstage.

Referenceinputforinternalcomparators/erroramplifier.NC,thispinisnotused,andshouldbeleftopen.Faultinputforover-voltageorover-loadprotection.Senseinputforthebiasrailforstartupcontrol.ThispinshouldbeconnecteddirectlytoVDD.Noconnectionshouldbemadetothispin.

ControloutputfortheexternalstartupFETforstartupcontrol.DriveforPFCFET.Groundforinternalcircuitry.

UCC29910A

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DetailedPinDescription

Pin1–VDD:Thispinsuppliespowertothedevice.Aminimumsupplyvoltagelevelof3.0Vandmaximumof3.6Visrecommended.

Pin2–VBULK:Theoutputvoltagelevel,VBULKissensedonthispin.TheHVbulksensingnetworkshouldbescaledsothatthedesiredoutputvoltageproducesVNMatthispin.TheTheveninimpedanceatthispinshouldbebelow20kΩ,withappropriatecapacitanceprovidedfornoisefiltering.

注

TheVBULKscalingandLINESNSscalingmustmaintainaratioofcloseto4:1toensureoptimumoperationoftheSmartStartalgorithm.

Pin3–CS:ThispinsensesthecurrentinthePFCstage.BothCSpinsmustbeconnectedtothecurrentsensesignalanditisnotpermissibletoleaveonefloating.TheCSpinsareintendedtosenseaveragelowsidePFCFETcurrentdirectly.A150-mΩcurrentsenseresistorvalueisoptimalforpowersof90W,withappropriatescalingforhigherpowerlevels.Therecommendedfeedimpedancelevelisapproximately100Ω,andacapacitorof1µFisalsorecommendedtoactasafilterontheinputcurrentandtominimisenoisepickup.Asmallervaluecapacitormayresultinpossiblecurrentloopinstability.AlargercapvaluemayresultinpoorPowerFactor(PF)duetoexcessivecurrentsignalphaseshift.UCC29910Adoesnotprovidecycle-by-cycleinductorcurrentlimiting.Anexternalcircuitisneededifthistypeofprotectionisrequired.

Pin4–LINESNS:Thispinsensestherectifiedlinevoltage.Theinternalreferenceforthispinisinternallyscaledto¼oftheVBULKreference.

注

TheLINESNSscalingandVBULKscalingmustmaintainaratioofcloseto1:4toensureoptimumoperationoftheSmartStartalgorithm.

Apeakofhigh-linevoltage(typically373-Vfor264-VACinput)shouldbescaledtocorrespondto1.158VDCatthispin.Apinfeedimpedanceoflessthan20kΩisrecommendedalongwithafiltercapacitorofatleast2.2nFfornoisefiltering.TheRMSvoltageatthispinmustbegreaterthanVBHbeforePFCDRVcanstartswitching.ThePFCDRVwillgolowiftheRMSvoltagedropsbelowthebrownoutlevelVBL(21mstimeout).ThecontrollerwillnotstartifVLINESNSexceedsVLM,(VBULK=0V).

Pin5–CS:Seepin3descriptionabove.ThispinsensesthecurrentinthePFCstage,pins3and5mustbeconnectedtogether.

Pin6–REFIN:Thispinmustbeconnectedtoanexternalaccurate1.500Vreferencesource,e.g.usingasuitableshuntregulatorwithvoltagesettingresistorssuchasTLVH431A.Thereferencevoltagemustbeestablishedwithin100msafterVDDreaches3.0V.Pin7–NC:Thispinisnotused,andshouldbeleftopen.

UCC29910A

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Pin8–FAULT:ThispinwhenpulledlowcausesPFCDRVandBIASCTRLtogolow,typicallywithin10us.Aftera100usdelaytheFAULTinputissampledagain.IftheFAULThasclearedhigh,theUCC29910AgoesintoSmartStartmode.IftheFAULTinputisstilllowthedeviceentersalatchedshutdownstate.

Pin9–BIASSNS:ThispinisusedtosensethePFCstagebiasrail(normallyinthe8Vto12VrangetodrivethePFCpowerMOSFET)duringstart-uptoallowcontroloftheexternalstart-upFET.ThevoltageatthispinmustbegreaterthanVB(max)beforePFCDRVswitchingcommences.IfthevoltagedropsbelowVB(min)theBIASCTRLoutputgoeslow,whichcanenableanexternalstart-upFET.Pin10–TST:Thispinprovidesnouserfunction.ItmustbeconnectedtoVDD.Pin11–NC:Thispinisforinternaluseonly,andmustbenormallyleftopen.Pin12–BIASCTRL:Thispinallowscontrolofanexternalstart-upFET.

Pin13–PFCDRV:Thispinisusedtodrivethelow-sidePFCFETindirectly.Thispinshouldbeconnectedtoalevel-shiftinggatedrivertoprovidetherequireddrivesignalamplitudefortypicalhighvoltagepowerFETs.Forthisdrivesignal,D最大值islimitedto90%dutycycle.

Pin14–VSS:Thispinisthecommongroundconnectionforthedevice.

UCC29910AFunctionalBlockDiagram

UCC29910AEN14Start-up BurstVSS

VDD

11.92V+POR“Smart-Start”Soft StartBurst ControlGate ControlLogicBrown-outRun/StopDetection&FilterLatch reset detectPFCDRV BlankingCLKREFOscillatorVoltage LoopPI ErrorAmp13PFCDRV

LINESNS

4BULK OVClampVBULK2ENPFC Duty CycleDisable+CSCS

35-PWMGeneratorENLight Load DetectBurst ModeControlFault Latch8FAULT

EN9BIASSNS

REFIN6REFENStartupBias Control12BIASCTRL

10NC

711UDG-11105TST

UCC29910A

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ZHCS258A–MAY2011–REVISEDJUNE2011

应用信息

TheUCC29910AcontrolsaBuckPFCstageandisparticularlysuitedtoAC/DCapplicationsinthepowerrangefrom65Wto130W.AfullycharacterisedreferencedesignusingtheUCC29910APFCcontrollerandtheUCC29900IntegralCycleControllerisavailableonrequest.Thedesignisfora90WPSUintendedforlaptopadapterapplications.ItcomprisesaBuckPFCfrontendusingtheUCC29910Atoconvertlinepowertoanominal84VDC.AUCC29900controlstheconversionofthisbulkvoltagetoanominal19.25Voutputusingahalfbridgeoutputpowerstage.TheparagraphsfollowinggivesomedetailsonhowtheUCC29910Ahasbeenusedinthisapplication.AdditionalguidelinesforboththeUCC29910AandUCC29900areavailableonrequest.

POR

APowerOnResetfunctionoperatesatturn-on.

StartUpBiasControl

ThisblockcontrolstheBIASCTRLoutputwhichmaybeusedtocontrolanexternaldepletionmodestart-upFETduringthestart-upphaseandalsowhiletheUCC29910AisoperatinginSmartBurstLightLoadmode(explainedbelow).AfterPORtheBIASCTRLoutputisheldlowuntilthevoltageattheBIASSNSpinreachesVB(max)atwhichpointBIASCTRLisdrivenhighwhichturnstheexternalFEToffandthestart-upphaseisinitiated.TheUCC29910AcontinuestomonitorthevoltageattheBIASSNSpinandifitdropsbelowVB(min)BIASCTRLgoeslowagain,turningthestart-upFETonagain.Attheendofthestart-upphasetheUCC29910AentersnormalmodeoperationandBIASCTRLpinisheldhigh.Innormalmode,auxiliarywindingsmaintaintheVCCArail(see图5).WhentheUCC29910AisoperatinginSmartBurstlight-loadmodethereisapossibilitythattheseauxiliarywindingscannolongersupplyenoughcurrenttosupportthebiassupplywithinacceptablelimits.Thestart-upbiascontrolblockpreventsthebiasrailfromcollapsingbysettingtheBIASCTRLpinlowifVBIASSNSdropsbelowVB(min).Thissignalmaybeusedtoturnontheexternalstart-upFETon,therebysupplyingaddedcurrenttothebiasrail.IfVBIASSNSincreasesaboveVBLO(495mVapprox.)BIASCTRLissetlowagain.Thebiasrailisthereforecontrolledbetweenacceptablelimits.

Brown_OutDetectionandFilter,LatchResetDetect

IftheRMSvoltageattheLINESNSpindropsbelowVBLformorethan21ms(approx)thecontrollerlatchesoff.Inthiscondition,thePFCDRVpinislow.TheUCC29910ArecoversfromthisstateiftheRMSvoltageattheLINESNSpinfallsbelowtheresetlevel(VRS=218-mVRMS)foratleast120msandthenincreasestoatleastVBH.WhenthishappenstheUCC29910Aentersitsstart-upmodeaftera10-stimeout.Powercyclingisnotneededforrecoveryafterabrown_outevent.

SmartStart,SoftStart,BurstControl

Thismodulecontrolsthegatecontrollogicduringthestart-upphase.

振荡器

Theinternaloscillatorrunsatafixed100kHz.

UCC29910A

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Controlsystem

TheUCC29910Ausesanaveragecurrentmodecontrollooptoregulatetheoutputvoltage,thiseliminatestheneedforslopecompensation.ThetwoinputstothiscontrollooparethevoltagesattheVBULKandCS(CurrentSense)pins.

VoltageLoop–PIErrorAmp

TheoutputofthePI(ProportionalIntegral)ErrorAmplifierisproportionaltothedifferencebetweenthevoltagesattheVBULKpinandtheREFINpins.Theintegraltermintheamplifierdrivesthesteadystateerrortozerobut,incommonwithvirtuallyallPFCcontrollersthecontrolloopbandwidthisverylow–approximately10Hzinthiscase.

CurrentSense

TheCSpinsallowtheUCC29910Atosensetheaveragecurrentinthepowerstage.ThecurrentsensesignalissubtractedfromthedemandsignalfromtheerroramplifierandtheresultisusedtosetthePFCDRVdutycycle.

PWMGenerator

ThePWMGeneratorgeneratesadutycyclesignalwhichisfedintothegatecontrollogic.Thedutycyclecommandedisproportionaltothedemandsignalfromthecontrolloop.

LightLoadDetect/BurstModeControl

Astheloadonthepowerstagedecreasesthestandinglossesdueto,forexample,thedrivepowerneededtoeffectswitchingofthemainpowerMOSFET,becomesanincreasinglyimportantproportionofthewhole.TheUCC29910AincludesaSmartBurstlight-loadmodewhichsignificantlyreducesthesestandinglosses.InNormalModeoperationtheUCC29910AcontinuouslyswitchesthepowerMOSFET,inlightloadthepowerMOSFETisswitchedinaburstmode.Powerlossesarereducedverysignificantlybetweenburstsbecausethereisnoswitchingactivityinthepowertrain.Duringtheburst,thepowertrainisefficientlyoperatedatclosetofullpower.Theaveragepowertransferredfrominputtooutputiscontrolledbymodulatingtheintervalbetweenbursts.

GateControlLogic

TheGateControlLogicblocktakestheinputsfromanumberofsourcesandoutputsthePFCDRVsignal.ThefaultlatchoutputdisablesthegatecontrollogicandsetsthePFCDRVtolow.

TheBULKOVclampforcesthePFCDRVoutputlowifthevoltageattheVBULKpinexceeds107%ofVNM.TheStart-upburstsignaldeterminesthePFCDRVonandofftimesduringthestart-upphasebeforethePWMgeneratorbecomesactive.

ThePFCdutycyclesignalsetsthePFCDRVoutputdutycycledemandinnormalmode.AlinedependentD最小值anda90%D最大值limitareapplied.

Thelightloaddetectburstmodecontrolblockcontrolsoperationduringlightloadmodeandentrytoandexitfromthismode.

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BULKOVClamp

ThelowbandwidthofthenormalcontrollooppreventsitfromcontrollinganincreaseinVBULKdueforexample,toalargestepreductionintheloadontheVBULKoutput.Thisclampactivateswithin120µsifthevoltageattheVBULKpinexceeds107%ofVNM.Whenactivated,itblanksthegatecontrollogicoutputandthePFCDRVpinisheldlow.Thisclampisnon-latchingsoitreleasesonceVBULKfallsbelowtriplevel,i.e.,107%ofVNM.ForashortdurationBULKOVclampevent,recoverywillbebacktotheoperatingmodeinplaceatthebeginningoftheevent(usuallynormalmode).IfVBULKstaysabovetheclamplevelforlongenough,theconditionsforentryintolightloadmodemaybesatisfiedandrecoverywillbeintolightloadmode.

参考书籍

AllofthemeasurementfunctionswithintheUCC29910AusetheREFINpinfortheirreferencevoltage,theseinclude(VNM，VBH，VBL，VLM，VB(max)，VB(min)和VCS).Thespecificationsarewrittenontheassumptionthatthereferencevoltageis1.500Vandvariationsinthiswillproportionallyaffecttheaccuracyofmeasurements.TheREFINpinshouldbebypassedtoVSStoreducenoise.A100-nFcapacitorconnectedbetweenpin6andpin14isrecommended,thispartshouldbeplacedascloseaspossibletothecontrollerandconnectedwithminimumlengthtracks.

FaultLatch

ThislatchisactivatedbypullingtheFAULTpintoVSS.WhenactivatedthecurrentPWMcycleisterminated,PFCDRVisheldLowandBIASCTRLissetlow.ThecontrollerentersSmartStartmodeiftheFAULTinputclearshighinlessthantf(100µs).IftheFAULTinputpersistsforlongerthantfthecontrollerentersalatchedshutdownmodeThelatchedstateisclearediftheLINESNSpinisheldbelow215mVRMSfor120ms.Thecontrollerwillre-startaftera10-sdelay,providingLINESNShasrecoveredtoatleastVBH.Alternativelycyclingchippoweroffthenonwillalsoclearthelatchedstate.Connectinga1-nFcapacitorbetweentheFAULTpinandVSSisrecommendedtoreducetheriskofnuisancetripping.

PFCDrive

ApowerMOSFETdriver,suchasanNPNandPNPtransistororaUCC27324willnormallyberequiredtoconvertthePFCDRVoutputfromtheUCC29910AtothecurrentandvoltagelevelstypicallyneededtoensurecorrectpowerMOSFEToperation.

UCC29910A

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BuckPFCPowerStage

ThePFCstageconvertstheincomingrectifiedlinevoltagetoaDCvoltageontheoutputcapacitors,powertransferhappeningduringthetimeswhenthelinevoltageisgreaterthantheoutputvoltage.Theresultingconductionangleisafunctionofboththeincominglineandoutputvoltages.Inthereferencedesignmentionedabove,theoutputvoltageissetto84VDC.ThisislowenoughtoallowconductionanglessufficienttoachieveaPF(PowerFactor)ofatleast0.9overaninputvoltagerangefrom90VACto264VAC.OtheroutputvoltagelevelsmaybesetbyalteringthevoltagesensingnetworkattheVBULKpin.A4:1ratiobetweentheVBULKandLINESNSscalingensuresoptimumoperationoftheSmartStartalgorithm,soiftheVBULKscalingisalteredsignificantly,thentheLINESNSscalingshouldbealteredtoo.Ahighefficiencysecondstage,controlledbyaUCC29900,canthendown-converttoanominaloutputof19.25Vusingatransformerwithasimple4:1turnsratio,ortoanyotherdesiredoutputvoltage.ThebasicBuckPFCpowerstageisshownin图1.Thislow-sideswitchedbuckstagehasthesameperformanceasthemoreusualhigh-sideswitchedbuckconverter.ItfeatureseasypowerFETdrive,attheexpenseofrequiringoutputsensethroughaPNPlevelshifttransistor,Q9.TheincomingAClineisfedthrougharectifierandfilterstages,notshownhere.Theresultingunipolarvoltage(VHV)isthenfedintothepowerstage.TheMOSFETisswitchedataconstant100kHzandthefreewheelingdiodefunctionisprovidedbyD1.Theoutputvoltage(VBULK)isdevelopedacrossthetwolargecapacitors,C2andC21.

D1C2470?F100VC21470?F100VR151M0.5%R161M0.5%VBULKL6AEQ25Q1R17330k?0.5%R214.4MQ912LINESNSR30R15R7813k?1%VBULKR7216.875k?1%VINTERUDG-11106-VPRI

图1.BuckPowerStage(simplified)

VacIacVbulkConductionAngle图2.IllustrativeLineCurrentandVoltage

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Thebuckconverteroperatesoffarectifiedsinusoidandthereareperiodicdeadtimeswhentheinputvoltageislowerthantheoutput.Duringthesetimesnopowercanbetransferredtotheoutputandtheinputcurrentisnominallyzero.图2showsthelinecurrent,IAC,fallingtozerowhenVACislessthanVBULK.TheassociatedconductionangleincreasesastheRMSlinevoltageincreasesandthecurrentwaveformchangesfromlowlinetohighline.TheinputcurrentisskewedalittletowardsthebeginningoftheconductioncyclebecauseVBULKisatitslowestvalueatthistimesoconductionstartsatalowervoltagethanitfinishes.Thiseffectmaybeseenin图3和图4.Thesewaveformsaretakenfroma90-WbuckPFCreferencedesign,bothmeettheharmonicsrequirementssetoutinEN61000-3-2andtheirPFisgreaterthan90%.

图3.115V,60Hz,FullLoad,0.5A/div

图4.230V,50Hz,FullLoad,0.5A/div

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Start-UpWithExternalFET

Conventionalstart-upschemesutilisingeitherresistiveorenhancementmodeMOSFETfeedsincurlinedependantstaticpowerlosses.Toavoidthesepowerlossesandtoobtainanoptimumturn-ontimeanexternaldepletionmodeFETmaybeused图5和图6.TheVHVnodeisconnectedtotherectifiedincomingline.Q12isadepletionmodeFETwhichwillstartchargingC45assoonaslinepowerisconnected.InitiallyU1isinactiveandBIASCTRLislow.TheVDD_3VrailwillbegintoincreaseasU10startstoconduct.ThePOR(PowerOnReset)sequenceofU1willbeginoncethisrailgetstoabout1.7VandwillexecutewhiletheVDD_3Vrailisbeingestablished.TheBIASCTRLpinwillgohighwhenBIASSNSreachestheVB(max)级别上验证其电路。IfVLINESNSisthen>VBH,U1beginstopulsethePFCDRVpin,whichstartstheprocessofchargingthebulkcapacitorsattheoutputofthebuckPFCpowerstage.ThePFCDRVcurrentisdrawnfromC45,whichstartstodischarge.IfthevoltageattheBIASSNSpinfallsbelowVB(min)thenPFCswitchingisdisabledandQ12isturnedontore-chargeC45.WiththegivencomponentvaluestheVB(max)levelcorrespondsto12VandaVB(min)levelof6VattheVCCArail.TheusersetstheVB(max)和VB(min)levelsdependingonthecharacteristicsofanyalternativecomponentsusedbyadjustingR84.

HVR510kWQ12BSS126R771MR80390WVCCAU10TPS71533DCKR4VINGNDOUT5VDD_3VR84680kW2R7614.3kW9C45100mF16V10TSTBIASSNS1VDD1113NCPFCDRVVBULK2U1UCC29910APWC78470nFR7630kW5%8FAULTCS5LINESNS46REFINNC7VSS14BIASCTRL12CS3R8556kWVPRIR75143kW5%U13TLVH431ACDBZR

C80100nFTP4R86300kWUDG-11108

图5.SimplifiedSchematic

UCC29910A

www.ti.com.cn

ZHCS258A–MAY2011–REVISEDJUNE2011

图6.Start-UpSequenceWaveforms(Ch1(Y),PFCDRV,Ch2(R),VCCA,Ch3(B),DUTVO)

UCC29910A

ZHCS258A–MAY2011–REVISEDJUNE2011

www.ti.com.cn

SmartStart,VBULKRamp-Up

OnceVCCAhasreached12VandQ12hasbeenturnedoff,andVLINESNS>VBH,thePFCDRVoutputofU1becomesactiveandbeginsdrivingthemainpowerMOSFET.TheSmartStartalgorithmincreasesVBULK,thevoltageacrossC2andC21,asrapidlyaspossible.Thisisdonebytransferringthemaximumamountofenergypossibleduringeachpulseset.TheUCC29910ArequiresthattheinductorhasaVolt-secproductwithstandratingof600Vµs.InfactanyinductorsuitableforapplicationinabuckPFCstagewillalreadymeetthisrequirementinordertocarrythefull-loadcurrentsinvolvedwithoutsaturating,thereforetheVolt-secratingwillnotresultinanyadditionalconstraintsontheinductordesign.HoweveritismoreconvenienttothinkintermsofappliedVolt-secproductratherthanthepeak-inductorcurrent.

TheUCC29910A’sSmartStartalgorithmgeneratesaseriesofpulsesfortheswitchingMOSFETwhichapplyaconstantVolt-secproducttotheinductorduringtheonandoffintervals.ThisensuresthattheinductorcurrentisrampedupashighaspossiblewhiletheMOSFETisonandthendecaystozeroduringtheofftime.Infact,TOFFisextendedto110%ofnominalwhichprovidesmargintoensuretheinductorcurrentrampsbacktozero.TheUCC29910Ameasurestheinstantaneouslinevoltageandtheoutputvoltage(VHV和VBULK输入图1).ThevoltageappliedtotheinductorwhenQ1isonisthenfoundbysubtractingthesetwovalues.ItthencalculatesanappropriateTONcorrespondingtoa600Vxµsproduct.TOFFiscalculatedinasimilarfashionexceptthattheinductorvoltageduringtheofftimeisthevoltageonthecapacitorsC2andC21(VBULK)plustheforwardvoltagedropinD1whichisassumedtobe0.6V.Inductorcurrentiscontrolledonacycle-by-cyclebasisbyconstrainingtheTONandTOFFvaluessothattheinductorVolt-secproductisneverexceeded.TheinitialTOFFintervalsaretypically1.1mslongbecausethebulkcapacitorvoltageisstillverylow.AsVBULKincreases,thecurrentramp-downrateincreasessothattherequiredTOFFreduces,allowingthepulsestooccurmorefrequently.Inaddition,asVBULKrises,thevoltageacrossthePFCinductorduringTONwilldrop,sotheon-timeisadjustedtomaintainaconstantPFCinductorvolt-secsproduct.

Duringramp-uptheUCC29910AmonitorsthevoltageattheBIASSNSpinandifitfallsbelowVB(MIN)theramp-upoperationisterminatedandtheBIASCTRLpingoeslow.Inthereferencedesigntheminimumbiasvoltagewillbeapproximately6V.WhenBIASCTRLgoeslow,Q12isturnedonagainandC45willbeginchargingbackuptowards12V.Theramp-upphaseisthenre-started.Amaximumof10suchrestartsisallowedbeforetheUCC29910Agoesintoalatchedshutdownmode.Linepowercyclingisnecessaryforrecoveryfromthismode.

Typically,thecapacitorvoltageincreasesmonotonicallyuntilthevoltageattheVBULKpinreaches1.024V.ThisisslightlylowerthanVNMandinthecircuitof图1correspondstoaVBULKacrossC2andC21of82V.TheUCC29910AthenswitchestoNormalModeoperation.Thisapproachallowsthefastestpossiblestart-uptime.Inordertosavestandbypoweratnoload,oncethestart-upphaseiscomplete,andVBULKisbeingregulated(eitherbythenormalmodevoltageregulationloop,ortheSmartBurstlight-loadmode),theBIASCTRLpinisdrivenhigh.Thisturnsthestart-upfetoffwhicheliminatesthepowerlossinthestart-upcurrentpath.WhileinSmartBurstmodethevoltageattheBIASSNSinputismonitored.IfthevoltageatthispindropsbelowVB(min)thenthestart-upfetisturnedbackontorechargethecapacitorsontheVCCArail.Inthiswayandwiththecomponentvaluesshown,theVCCArailismaintainedabove6V.

UCC29910A

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ZHCS258A–MAY2011–REVISEDJUNE2011

NormalModeOperation

Innormalmode,theVBULKpiniscontrolledatVNM.Duetotheslowvoltageloop,andlowgainat100/120Hz,thevoltageloopPIerrorampoutputwillbeessentiallyafixeddemand.IfthepowerstagestaysinDiscontinuousConductionMode(DCM)throughoutthehalf-cycle,thenpeakcurrentwillbeproportionalto(VHV-VBULK)overthehalfcycleandIAVGisapproximatelyproportionaltoIPEAK.IfthepowerstagetransitionsintoContinuousConductionMode(CCM)duringthelinecycle,thecurrentloop,respondingtotheaveragecurrent,keepsthepeakcurrentflatter,sothelinecurrentdoesn’tquitefollow(VIN-VO)anymorebutaveragelinecurrentisapproxproportionalto(VHV-VBULK)overthehalf-cycle.Theoveralleffectisshowninthecurrentwaveformsin图3和图4.

ThelinevoltageisusedbythecontrollooptosetdynamicD最小值andD最大值values.

TransientResponseandVBULKRegulation

WhentheUCC29910Aisregulatinginnormalmode,theVBULKpinwillbeatVNM.AnACrippleattwicelinefrequencywillbesuperimposedonthisasthePFCstagedrivescurrentintothebulkcapacitors.Theamplitudeofthisripplewillbeafunctionoflinefrequency,capacitancevalueandloadcurrent.DuetothenecessarylowcontrolloopbandwidthVBULKwillreduceinresponsetoasteploadincrease.IftheloadstepislargeenoughtocausetheVBULKpintoreducetolessthan0.992Vtheloopresponseistemporarilyspeededupuntilthisvoltagehasbeenincreasedbackupto1.043Vatwhichpointtheoriginalloopresponseisrestored.

SmartBurstMode(lightload)

AsloadcurrentreducestheUCC29910AwillcontinuetoregulatethevoltageattheVBULKpinatVNM.ItwilldothisbyreducingthePWMDRVwaveformdutycycle,exceptthatanypulseswhicharecommandedtobelessthanD最小值willbemaskedandnotdeliveredtothePWMDRVoutput.Theproportionofcyclesthusdroppediscountedovera10-mswindowandifitexceeds10%theUCC29910AchangesitsoperatingmodetoSmartBurstmode.

InSmartBurstmodetheUCC29910Aentersalowpowerconsumptionmodetominimizewastedpowerandimprovelight-loadefficiency.Every1ms(approximately)itsamplesthevoltagesattheLINESNSandVBULKpins.IfthevoltageatVBULKisstillwithinatargetwindowof1.087Vto1.074Vnoactionistaken.TheappliedloadwilleventuallycausethebusvoltagetodropbelowthiswindowandaburstofpulsesarethenoutputatthePFCDRVpin.ThesedrivethePFCFETandtherebyrechargethePFCbuscapacitance.Themostefficienttransferofpowerisachievedbyminimizingthenumberofswitchingevents,thusminimizingswitchingandgatedrivelosses.ThelinevoltagesampleisusedtosetthemaximumsafedutycycleforthePFCDRVpulseswhilekeepingtheinductorcurrentdiscontinuous,basedonaninductorratingof600Vµs.ThepulsedutycycleisrampedfromD最小值tothismaximumvalue.Attheendoftheburst,thepulsedutycycleisrampedbacktoD最小值.RampingthedutycycleinthismanneravoidsthesuddenapplicationofhighpowerpulsestothepowertrainwhichmaycauseexcessiveEMIandunwantedaudionoisegeneration.AfullSmartBurstpulsewilllastfor2ms–includingtheramp-uptimebutexcludingtheramp-downtime.

TheSmartBurstpulsetrainisterminatedifthevoltageattheVBULKpinreachesthepeakvalueoftheallowedwindow,1.087Vorifitexceeds2msinlength.Thereisa5-msminimumtimebetweenthestartofsuccessiveSmartBurstpulsetrains.

Themaxburstlengthandminimumburstrepetitionintervalensurethatasloadisincreased,atsomepointtheburstratewillbecomeinsufficienttomaintainVBULK.OncethevoltagefallsbelowthenormalmodesetpointVNMattheVBULKpinthecontrollerrevertstonormalregulationmode.

UCC29910A

ZHCS258A–MAY2011–REVISEDJUNE2011

www.ti.com.cn

PFCInductorValue

ThePFCinductorisdesignedforaninductancevaluethatensuresDCMoperationathighline(i.e.>160VAC),rightuptofull-peakload.Withanappropriatevalueofinductance,operationatlowlineshouldthenresultinCCMoperationovermostoftheconductionangleatfullload.Theinductancerequiredisgivenby:

LPFC

where:

æVBULKö1

=-VV÷(IN(pk)BULK)ççV÷2´fSW´IIN(pk)

èIN(pk)ø

PIN(avg)´p2´VIN(pk)

(1)

IIN(pk)=

1-sin(qSTART)

111

´p-´cos(qSTART)´sin(qSTART)´-´(qSTART)422

(2)

Andπisthestageconversionefficiency,θSTARTisthephaseangle(inradians)atwhichconductionstarts,where

theinstantaneouslinevoltageequalsthebulkvoltage.Fora100-Wconverterwithan84-VBULKDCoutputweevaluatetheequationat160Vasfollows.

LPFC=

2´100´103Hz´1.033A

()(æö84V2´160V-84Vç÷=94.9mH

è2´160Vø2

)

(3)

ComparedtotheBoostPFC,muchsmallervaluesofPFCinductancecantypicallybeusedinthebuck,becausethevoltagedifferentialthatneedstobesupportedacrosstheinductorislower.Practicalinductancevaluesthathavebeenusedinvariousdesignshaverangedfrom~150µHat50W,to~80µHto100µHat90Wto130W.

UCC29910A

www.ti.com.cn

ZHCS258A–MAY2011–REVISEDJUNE2011

BulkCapacitorChoice

Thevalueofbulkcapacitancerequiredisdictatedbyrequirementsontheallowableripplevoltageandhold-uptime.Inapplicationswherehold-uptimeisnotthemainfactor,thenthecapacitorsshouldbesizedforapproximately12%peak-to-peakrippleasfollows:

CBUS=

PLOAD´qcond_%

VBUS2´DVBUS(%)´2´fAC

(4)

Foratypical90-WadapterusingbuckPFC,therequiredbuscapacitancefor±6%maximumrippleat90VAC/50Hz(12%totalripple)andat84VDCbus,assuming96.5%efficiencyofthesecondstage,wouldbe:

CBUS

´0.570.965==628mF2

84´0.12´2´50

(5)

where:

•PLOAD:loadpowerdrawn(usuallybythesecondregulation/isolationstage)•CBUS:buscapacitance

•θCOND_%:conductionangleatAClineofinterest(asdecimalpercentageoftotalcycle,e.g.50%conductionangleexpressedas0.5)•fAC:AClinefrequency

Thecapacitancerequiredtoachieveaspecificholduptimemaybecalculatedasfollows:

CBUS=

THOLDUP´2´PLOAD

BUS(min)

-VBUS(min_reg)2

)(6)

Forexample,inordertoachieve3-msholdup,withnominalbusvoltageof84VDC,±5%maximumbusripple,and70-VDCminimumbusregulationlevelforthesecondstage,therequiredbuscapacitancewouldbecalculatedasfollowsfora90-Wload,assuming96.5%secondstageefficiency:

CBUS

0.965=381mF=2

(84´0.95)-702

0.003´2´

()(7)

参考

1.2009/10PowerSupplyDesignSeminar-SEM1900Topic4,PowerFactorCorrectionUsingtheBuckTopology–EfficiencyBenefitsandPracticalDesignConsiderations

修订历史记录

ChangesfromOriginal(May2011)toRevisionA••••

Page

Added新说明........................................................................................................................................................................1AddedanupdateddescriptionfortheTSTpin.....................................................................................................................4AddedanupdateddescriptionfortheTSTpin.....................................................................................................................6ChangedUCC29910AFunctionalBlockDiagram................................................................................................................6

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TI对应用帮助或客户产品设计不承担任何义务。客户应对其使用TI组件的产品和应用自行负责。为尽量减小与客户产品和应用相关的风险，客户应提供充分的设计与操作安全措施。

TI不对任何TI专利权、版权、屏蔽作品权或其它与使用了TI产品或服务的组合设备、机器、流程相关的TI知识产权中授予的直接或隐含权限作出任何保证或解释。TI所发布的与第三方产品或服务有关的信息，不能构成从TI获得使用这些产品或服务的许可、授权、或认可。使用此类信息可能需要获得第三方的专利权或其它知识产权方面的许可，或是TI的专利权或其它知识产权方面的许可。对于TI的产品手册或数据表，仅在没有对内容进行任何篡改且带有相关授权、条件、限制和声明的情况下才允许进行复制。在复制信息的过程中对内容的篡改属于非法的、欺诈性商业行为。TI对此类篡改过的文件不承担任何责任。

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PACKAGE OPTION ADDENDUM

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11-Apr-2013

PACKAGING INFORMATION

Orderable DeviceUCC29910APWUCC29910APWR (1)

Status(1)Package TypePackagePinsPackageDrawingQtyTSSOPTSSOPPWPW1414902000Eco Plan(2)Lead/Ball FinishCU NIPDAUCU NIPDAUMSL Peak Temp(3)Op Temp (°C)-40 to 85-40 to 85Top-Side Markings(4)SamplesACTIVEACTIVEGreen (RoHS& no Sb/Br)Green (RoHS& no Sb/Br)Level-1-260C-UNLIMLevel-1-260C-UNLIM29910A29910A The marketing status values are defined as follows:ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.PREVIEW: Device has been announced but is not in production. Samples may or may not be available.OBSOLETE: TI has discontinued the production of the device.

(2)

Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availabilityinformation and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined.

Pb-Free (RoHS): TI's terms \"Lead-Free\" or \"Pb-Free\" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement thatlead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.

Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used betweenthe die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.

Green (RoHS & no Sb/Br): TI defines \"Green\" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weightin homogeneous material)

(3)

MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4)

Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a \"~\" will appear on a device. If a line is indented then it is acontinuation of the previous line and the two combined represent the entire Top-Side Marking for that device.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on informationprovided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken andcontinues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

Addendum-Page 1

PACKAGEMATERIALSINFORMATION

www.ti.com

26-Jan-2013

TAPEANDREELINFORMATION

*Alldimensionsarenominal

Device

PackagePackagePinsTypeDrawingTSSOP

SPQ

ReelReelA0DiameterWidth(mm)(mm)W1(mm)330.0

12.4

6.9

B0(mm)5.6

K0(mm)1.6

P1(mm)8.0

WPin1(mm)Quadrant12.0

UCC29910APWR2000

PackMaterials-Page1

PACKAGEMATERIALSINFORMATION

www.ti.com

26-Jan-2013

*Alldimensionsarenominal

DeviceUCC29910APWR

PackageType

TSSOP

PackageDrawing

Pins14

SPQ2000

Length(mm)

367.0

Width(mm)367.0

Height(mm)

35.0

PackMaterials-Page2

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在某些场合中，为了推进安全相关应用有可能对TI组件进行特别的促销。TI的目标是利用此类组件帮助客户设计和创立其特有的可满足适用的功能安全性标准和要求的终端产品解决方案。尽管如此，此类组件仍然服从这些条款。

TI组件未获得用于FDAClassIII（或类似的生命攸关医疗设备）的授权许可，除非各方授权官员已经达成了专门管控此类使用的特别协议。只有那些TI特别注明属于军用等级或“增强型塑料”的TI组件才是设计或专门用于军事/航空应用或环境的。购买者认可并同意，对并非指定面向军事或航空航天用途的TI组件进行军事或航空航天方面的应用，其风险由客户单独承担，并且由客户独力负责满足与此类使用相关的所有法律和法规要求。

TI已明确指定符合ISO/TS16949要求的产品，这些产品主要用于汽车。在任何情况下，因使用非指定产品而无法达到ISO/TS16949要求，TI不承担任何责任。

产品

数字音频放大器和线性器件数据转换器DLP®产品

DSP-数字信号处理器时钟和计时器接口逻辑电源管理微控制器(MCU)RFID系统OMAP应用处理器无线连通性

www.ti.com.cn/audiowww.ti.com.cn/amplifierswww.ti.com.cn/dataconverterswww.dlp.comwww.ti.com.cn/dsp

www.ti.com.cn/clockandtimerswww.ti.com.cn/interfacewww.ti.com.cn/logicwww.ti.com.cn/power

www.ti.com.cn/microcontrollerswww.ti.com.cn/rfidsyswww.ti.com/omap

www.ti.com.cn/wirelessconnectivity

德州仪器在线技术支持社区

www.deyisupport.com邮寄地址：上海市浦东新区世纪大道1568号，中建大厦32楼邮政编码：200122

通信与电信计算机及周边消费电子能源工业应用医疗电子安防应用汽车电子视频和影像

应用

www.ti.com.cn/telecomwww.ti.com.cn/computerwww.ti.com/consumer-appswww.ti.com/energywww.ti.com.cn/industrialwww.ti.com.cn/medicalwww.ti.com.cn/securitywww.ti.com.cn/automotivewww.ti.com.cn/video

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