HIGH PERFORMANCE
CMOS DUAL OPERATIONAL AMPLIFIERS
sOUTPUT VOLTAGE CAN SWING TO
GROUND
sEXCELLENT PHASE MARGIN ON
CAPACITIVE LOADS
sGAIN BANDWIDTH PRODUCT: 3.5MHzsSTABLE AND LOW OFFSET VOLTAGEsTHREE INPUT OFFSET VOLTAGE
SELECTIONSDESCRIPTION
The TS272 devices are low cost, dual operationalamplifiers designed to operate with single or dualsupplies. These operational amplifiers use the STsilicon gate CMOS process allowing an excellentconsumption-speed ratio. These series are ideallysuited for low consumption applications.
Three power consumptions are available allowingto have always the best consumption-speed ratio:
DSO8(Plastic Micropackage)NDIP8(Plastic Package)PTSSOP8(Thin Shrink Small Outline Package)uICC = 10µA/amp.: TS27L2 (very low power)uICC = 150µA/amp.: TS27M2 (low power)uICC = 1mA/amp.: TS272 (standard)
These CMOS amplifiers offer very high input im-pedance and extremely low input currents. Themajor advantage versus JFET devices is the verylow input currents drift with temperature (see fig-ure 2).
ORDER CODE
Part Number
Temperature Range
PackageN•••
D•••
P•••
1 - Output 12 - Inverting Input 13 - Non-inverting Input 14 - VCC-5 - Non-inverting Input 26 - Inverting Input 27 - Output 28 - VCC+1234-+-+8765PIN CONNECTIONS (top view)
TS272C/AC/BC0°C, +70°CTS272I/AI/BI-40°C, +125°CTS272M/AM/BM-55°C, +125°CExample : TS272ACN
N = Dual in Line Package (DIP)
D = Small Outline Package (SO) - also available in Tape & Reel (DT)P = Thin Shrink Small Outline Package (TSSOP) - only available in Tape & Reel (PT)
November 20011/9
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TS272C,I,M
BLOCK DIAGRAM
VCCCurrentsourcex IInputdifferentialSecondstageOutputstageOutputVCCEEABSOLUTE MAXIMUM RATINGS
SymbolVCC+VidViIoIinToperTstg
Parameter
Supply Voltage 1)
Differential Input Voltage 2)Input Voltage 3)
Output Current for VCC+ ≥ 15VInput Current
Operating Free-Air Temperature RangeStorage Temperature Range
0 to +70TS272C/AC/BC
TS272I/AI/BI
18±18-0.3 to 18±30±5-40 to +125-65 to +150
-55 to +125TS272M/AM/BM
UnitVVVmAmA°C°C
1.All values, except differential voltage are with respect to network ground terminal.
2.Differential voltages are the non-inverting input terminal with respect to the inverting input terminal.
3.The magnitude of the input and the output voltages must never exceed the magnitude of the positive supply voltage.
OPERATING CONDITIONS
SymbolVCC+Vicm
Supply Voltage
Common Mode Input Voltage Range
Parameter
Value3 to 160 to VCC+ - 1.5
UnitVV
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VCCT24T25T26T6T8T27T5T10T15SCHEMATIC DIAGRAM (for 1/2 TS272)
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R2T28T1InputT18T2InputR1C1T11T12T17T7T23T3OutputT19T4T16T9T13T14T20T22T21T29VCCTS272C,I,M
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TS272C,I,M
ELECTRICAL CHARACTERISTICS
VCC+ = +10V, VCC-= 0V, Tamb = +25°C (unless otherwise specified)
TS272C/AC/BC
Symbol
Parameter
Min.
Input Offset Voltage VO = 1.4V, Vic = 0V
Vio
Tmin ≤ Tamb ≤ Tmax
TS272C/I/M
TS272AC/AI/AMTS272B/C/I/MTS272C/I/M
TS272AC/AI/AMTS272B/C/I/M
Typ.1.10.90.25
Max.1052126.53
TS272I/AI/BITS272M/AM/BMMin.
Typ.
Max.1052126.53
Unit
1.10.90.25
mV
DVioIio
Input Offset Voltage DriftInput Offset Current note 1)
Vic = 5V, VO = 5VTmin ≤ Tamb ≤ TmaxInput Bias Current - see note 1
Vic = 5V, VO = 5VTmin ≤ Tamb ≤ TmaxHigh Level Output Voltage Vid = 100mV, RL = 10kΩTmin ≤ Tamb ≤ TmaxLow Level Output VoltageVid = -100mV
Large Signal Voltage Gain
ViC = 5V, RL = 10kΩ, Vo = 1V to 6VTmin ≤ Tamb ≤ Tmax
Gain Bandwidth Product
Av = 40dB, RL = 10kΩ, CL = 100pF, fin = 100kHzCommon Mode Rejection RatioViC = 1V to 7.4V, Vo = 1.4VSupply Voltage Rejection Ratio VCC+ = 5V to 10V, Vo = 1.4VSupply Current (per amplifier) Av = 1, no load, Vo = 5V Tmin ≤ Tamb ≤ TmaxOutput Short Circuit Current Vo = 0V, Vid = 100mVOutput Sink Current
Vo = VCC, Vid = -100mV
Slew Rate at Unity Gain
RL = 10kΩ, CL = 100pF, Vi = 3 to 7VPhase Margin at Unity Gain
Av = 40dB, RL = 10kΩ, CL = 100pFOvershoot Factor
Equivalent Input Noise Voltagef = 1kHz, Rs = 100ΩChannel Separation
65601078.28.1
21
1001
150
8.4
8.28
50
15
106
21
2001
300
8.4
µV/°CpA
IibpA
VOHVOLAvdGBPCMRSVR
V
50
15
mV
V/mV
3.580701000
15001600
6560
3.580701000
15001700
MHzdBdB
ICCIoIsinkSRφmKOVenVo1/Vo2
1.
µA
60455.03030120
60455.03030120
mAmAV/µsDegrees%nV-----------HzdB
Maximum values including unavoidable inaccuracies of the industrial test.
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TS272C,I,M
TYPICAL CHARACTERISTICS
Figure 1 : Supply Current (each amplifier) versus
Supply Voltage
2.0Figure 3b : High Level Output Voltage versus
High Level Output Current
20Tamb=25°C1612840-50VCC=10VVid=100mVVCC=16VSUPPLYCURRENT,ICC(mA)1.51.00.50481216OUTPUTVOLTAGE,VOH(V)Tamb=25°CAV=1VO=VCC/2-40-30-20-100SUPPLYVOLTAGE,VCC(V)OUTPUTCURRENT,IOH(mA)Figure 2 : Input Bias Current versus Free Air Temperature
100INPUTBIASCURRENT,IIB(pA)Figure 4a : Low Level Output Voltage versus Low
Level Output Current
1.00.80.60.40.2Tamb=25°CVic=0.5VVid=-100mV12OUTPUTCURRENT,IOL(mA)3VCC=3VVCC=10VVi=5VOUTPUTVOLTAGE,VOL(V)VCC=5V1012550751001250TEMPERATURE,Tamb(°C)Figure 3a : High Level Output Voltage versus
High Level Output Current
5Figure 4b : Low Level Output Voltage versus Low
Level Output Current
OUTPUTVOLTAGE,VOL(V)3VCC=10VOUTPUTVOLTAGE,VOH(V)43210-10Tamb=25°CVid=100mVVCC=5V2VCC=16V1Tamb=25°CVi=0.5VV=-100mVid048121620VCC=3V-8-6-4-20OUTPUTCURRENT,IOH(mA)OUTPUTCURRENT,IOL(mA)5/9
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TS272C,I,M
Figure 5 : Open Loop Frequency Response and
Phase Shift
Figure 8 : Phase Margin versus Capacitive Load
PHASEMARGIN,φm(Degrees)70Tamb=25°CRL=10kΩAV=1VCC=10V50PHASE(Degrees)40GAIN30GAIN(dB)045PhaseMargin9013560PHASETamb=25°CVCC+=10VRL=10kΩCL=100pFAVCL=10023420100-10105040GainBandwidthProduct1010510610180107300204060LFREQUENCY,f(Hz)80(pF)100CAPACITANCE,CFigure 6 : Gain Bandwidth Product versus Supply
Voltage
GAINBANDW.PROD.,GBP(MHz)3Figure 9 : Slew Rate versus Supply Voltage
7SLEWRATES,SR(V/µs)632Tamb=25°CRL=10kΩCL=100pFSR21Tamb=25°CRL=10kΩCL=100pFAV=1481216SR40SUPPLYVOLTAGE,VCC(V)681012SUPPLYVOLTAGE,VCC14(V)16Figure 7 : Phase Margin versus Supply Voltage
PHASEMARGIN,φm(Degrees)48Figure 10 : Input Voltage Noise versus
Frequency
300VCC=10VTamb=25°C200RS=100Ω4440363228Tamb=25°CRL=10kΩCL=100pFAV=10481216EQUIVALENTINPUTNOISEVOLTAGE(nV/VHz)10001101001000FREQUENCY(Hz)SUPPLYVOLTAGE,VCC(V)6/9
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TS272C,I,M
PACKAGE MECHANICAL DATA8 PINS - PLASTIC DIP
Dimensions
Aa1Bbb1DEee3e4FiLZ
Millimeters
Min.0.511.150.3560.2047.95
2.7.627.62
6.65.083.811.52
Typ.3.32
1.650.550.30410.929.75
0.0200.0450.0140.0080.313
Max.
Min.
InchesTyp.0.131
0.0650.0220.0120.4300.384
0.1000.3000.300
02600.2000.1500.060Max.
3.180.125
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TS272C,I,M
PACKAGE MECHANICAL DATA
8 PINS - PLASTIC MICROPACKAGE (SO)
LCa3b1c1a2se3DEM85F14Dimensions
Aa1a2a3bb1Cc1DEee3FLMS
Millimeters
Min.0.10.650.350.190.2.85.8
1.273.81
3.80.4
4.01.270.6
8° (max.)
0.1500.016
Typ.
Max.1.750.251.650.850.480.250.5
45° (typ.)5.06.2
0.10.228Min.0.0040.0260.0140.0070.010
a1bAInchesTyp.
Max.0.0690.0100.0650.0330.0190.0100.0200.1970.244
0.0500.150
0.1570.0500.024
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TS272C,I,M
PACKAGE MECHANICAL DATA
8 PINS - THIN SHRINK SMALL OUTLINE PACKAGE (TSSOP)
kc0.25mm.010 inchGAGE PLANEE1SEATINGPLANEAA2A15Db88CEL1LLL14e5PIN 1 IDENTIFICATIONDimensions
AA1A2bcDEE1eklLL1
Millimeters
Min.0.050.800.190.092.904.300°0.500.45
Typ.
Max.1.200.151.050.300.203.104.508°0.750.75
Min.0.010.0310.0070.0030.1140.1690°0.090.018
141InchesTyp.
Max.0.050.0060.0410.150.0120.1220.1778°0.0300.030
1.000.039
3.006.404.400.650.600.6001.000
0.1180.2520.1730.0250.02360.0240.039
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for theconsequences of use of such information nor for any infringement of patents or other rights of third parties which may result fromits use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specificationsmentioned in this publication are subject to change without notice. This publication supersedes and replaces all informationpreviously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices orsystems without express written approval of STMicroelectronics.
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