Error correction circuit

专利名称：Error correction circuit

发明人：Kodama, Yukio,Murakami, Kazuo,Yoshida,

Hideo, c/o Mitsubishi Denki K.K.

申请号：EP98111910.0申请日：19931021公开号：EP0880237A1公开日：19981125

专利附图：

摘要：An error correction circuit is capable of performing correction errors in data at ahigh speed. A syndrome generator (2) calculates syndromes of RS codes based on partialdata streams which are given from a data buffer (1). A received CRC generator (13)

performs CRC coding on the partial data streams which are given from a data buffer (1)to thereby obtain received CRCs. An error pattern CRC generator (14) calculates errorpattern CRCs of the respective partial data stream based on error patterns which aregenerated by an error pattern generation circuit (33). Under the control of a controlcircuit (40), the operations performed by the syndrome generator (2), the received CRCgenerator (13) and the error pattern CRC generator (14) are carried out at the same time.An improvement in the speed of error correction of the partial data streams performedby the error correction means directly leads to an improvement in the speed of thewhole error correction.

申请人：MITSUBISHI DENKI KABUSHIKI KAISHA

地址：2-3, Marunouchi 2-chome Chiyoda-ku Tokyo 100-8310 JP

国籍：JP

代理机构：Prüfer, Lutz H., Dipl.-Phys.

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